如題，小弟電資雜魚一枚，有大廠PMIC support team經驗
最近 LinkedIn 收到 NV HR 來信詢問對這個職缺是否有興趣。JD（詳見下方），
System Design Power Validation Engineer（DCDC Power)
What you'll be doing:
DC-DC Power signal measurement.
Power testing and debugging.
Compensation tuning.
Server/Motherboard/Mobile system functionality test.
Partner with hardware design engineers on debug and FA.
Co-work with mechanical/thermal engineers for cooler/heatsink design.
What we need to see:
Bachelor/Master in EE, computer science, or relative majors.
Familiar with Linux OS.
Good English communication skills.
Good PC system and Data center platform knowledge.
3+ years of experience
Ways to stand out from the crowd:
Experience in measuring DC-DC power solution.
Proactive personality.
Good team player.
Strong desire on creativity.
Quick thinking.
想請教詳細工作內容以及面試可能會問哪些問題？而且爬文下來NV多半會上機考演算法，因
為小弟固態出身的對電源 know how了解較微薄而且不擅長演算法如果要上機Leetcode或Hac
kerRank高機率會交白券因此很猶豫是否要答應面邀，擔心被洗臉XD
PS:保證不刪文，謝謝。